Design of a high‐performance advanced phase locked loop with high stability external loop filter-Reference-Cited by-同舟云学术

Design of a high‐performance advanced phase locked loop with high stability external loop filter

Published:2022-11-22 Issue:1 Volume:17 Page:1-12
ISSN:1751-858X
Container-title:IET Circuits, Devices & Systems
language:en
Short-container-title:IET Circuits, Devices & Syst

Author:

Kasilingam Kalpana¹,Balaiyah Paulchamy¹,Nuagah Stephen Jeswinde²,Kumar Shukla Piyush³

Affiliation:

1. Department of ECE Hindusthan Institute of Technology Coimbatore Tamil Nadu India

2. Department of Electrical Engineering Tamale Technical University Tamale Ghana

3. Department of Computer Science & Engineering University Institute of Technology Rajiv Gandhi Technological University of Madhya Pradesh Bhopal Madhya Pradesh India

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/cds2.12130

Reference30 articles.

1. A 0.4‐V, 90 ~ 350‐MHz PLL with an active loop‐filter charge pump;Moon J.‐W.;IEEE Trans. Circuits syst—II, Express Briefs,2014

2. A Frequency-Locked-Loop Filter for Biased Multi-Sinusoidal Estimation

3. A High-Performance PLL With a Low-Power Active Switched-Capacitor Loop Filter

4. A Low Power Fully Programmable 1MHz Resolution 2.4GHz CMOS PLL Frequency Synthesizer

5. Derivation and Design of In-Loop Filters in Phase-Locked Loop Systems

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