Design and simulation optimization of phase-locked loop structure for phase-shifting power supply

Abstract

A phase-locked loop (PLL) of a phase-shifting power supply for the power system is designed in this paper. Taking the industrial frequency current as the reference signal, the input and output characteristics of the phase-frequency detector with charge pump are analyzed. In addition, the transfer function of the PLL system is analyzed by combining the passive second-order low-pass filter and the voltage-controlled oscillator. As a result, the influence of parameters such as charge pump current, phase margin, and loop bandwidth on the performance of the PLL is investigated, and the optimal parameters of each section are obtained. The results show that the optimized PLL has a locking time of 0.75 s, a pull-out range of 63.16 Hz, and a locking range of 43.82 Hz, with high stability and noise immunity.