Reconfigurable arithmetic logic unit designed with threshold logic gates-Reference-Cited by-同舟云学术

Reconfigurable arithmetic logic unit designed with threshold logic gates

Published:2018-05-24 Issue:1 Volume:13 Page:21-30
ISSN:1751-858X
Container-title:IET Circuits, Devices & Systems
language:en
Short-container-title:IET Circuits, Devices & Systems

Author:

Medina‐Santiago A.¹^ORCID,Reyes‐Barranca Mario Alfredo²,Algredo‐Badillo Ignacio¹,Martinez Cruz Alfonso¹,Ramírez Gutiérrez Kelsey Alejandra¹,Cortés‐Barrón Adrián Eleazar²

Affiliation:

1. Computer Science DepartmentCONACYT‐National Institute of Astrophysics, Optics and ElectronicsLuis Enrique Erro No. 1Tonatzintla72840PueblaMexico

2. Electrical Engineering DepartmentCINVESTAV‐IPNAve. IPN No. 2508, Col. San Pedro Zacatenco07360CDMXMexico

Funder

Consejo Nacional de Ciencia y Tecnología

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2018.0046

Reference27 articles.

1. Evaluation and Comparison of Threshold Logic Gates

2. Operating Margin-Oriented Design Methods for Threshold Element-Based Reconfigurable Logic Circuits Realizing any Symmetric Function

3. Neuron MOS binary-logic integrated circuits. I. Design fundamentals and soft-hardware-logic circuit implementation

4. The efficiency of neuron-MOS transistors in threshold logic

5. Reconfigurable Threshold Logic Gates using memristive devices

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