Asymmetric large size multipliers with optimised FPGA resource utilisation-Reference-Cited by-同舟云学术

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Asymmetric large size multipliers with optimised FPGA resource utilisation

Published:2012-11-01 Issue:6 Volume:6 Page:372-383
ISSN:1751-8601
Container-title:IET Computers & Digital Techniques
language:en
Short-container-title:

Author:

Gao S.,Langlois P.,Al-Khalili D.,Chabini N.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

https://digital-library.theiet.org/content/journals/10.1049/iet-cdt.2011.0146?crawler=true&mimetype=application/pdf

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Fixed-Point Multiplication;Application-Specific Arithmetic;2023-08-23

2. A High-Performance ECC Processor Over Curve448 Based on a Novel Variant of the Karatsuba Formula for Asymmetric Digit Multiplier;IEEE Access;2022

3. Resource Optimal Design of Large Multipliers for FPGAs;2017 IEEE 24th Symposium on Computer Arithmetic (ARITH);2017-07

4. Single and multiple precision sequential large multipliers for field-programmable gate arrays;TURKISH JOURNAL OF ELECTRICAL ENGINEERING & COMPUTER SCIENCES;2016

5. Sequential Large Multipliers on FPGAs;Journal of Signal Processing Systems;2014-06-24

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