High performance and energy efficient single‐precision and double‐precision merged floating‐point adder on FPGA-Reference-Cited by-同舟云学术

High performance and energy efficient single‐precision and double‐precision merged floating‐point adder on FPGA

Published:2017-12-05 Issue:1 Volume:12 Page:20-29
ISSN:1751-8601
Container-title:IET Computers & Digital Techniques
language:en
Short-container-title:IET Computers & Digital Techniques

Author:

Zhang Hao¹,Chen Dongdong²,Ko Seok‐Bum¹

Affiliation:

1. Department of Electrical and Computer EngineeringUniversity of SaskatchewanCanada

2. Intel CorporationCaliforniaUSA

Funder

Natural Sciences and Engineering Research Council of Canada

University of Saskatchewan

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cdt.2016.0200

Reference26 articles.

1. ‘IEEE Standard for Floating‐Point Arithmetic’. IEEE Std 754‐2008 August 2008 pp.1–70

2. Design issues in division and other floating-point operations

3. Beaumont‐Smith Burgess A.N. Lefrere S. et al.: ‘Reduced latency IEEE floating‐point standard adder architectures’.Proc. 14th IEEE Symp. on Computer Arithmetic 1999 1999 pp.35–42

4. An IEEE compliant floating‐point adder that conforms with the pipeline packet‐forwarding paradigm;Nielsen A.M.;IEEE Trans. Comput.,2000

5. Delay‐optimized implementation of IEEE floating‐point addition;Seidel P.M.;IEEE Trans. Comput.,2004

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Design and analysis of a novel fast adder using logical effort method;IET Computers & Digital Techniques;2023-07

2. Area-latency efficient floating point adder using interleaved alignment and normalization;Microprocessors and Microsystems;2023-06

3. An area-delay efficient single-precision floating-point multiplier for VLSI systems;Microprocessors and Microsystems;2023-04

4. Minimal Path Delay Leading Zero Counters on Xilinx FPGAs;Computational Science – ICCS 2023;2023

5. Comparison of Different Design Alternatives for Hardware-in-the-Loop of Power Converters;Electronics;2021-04-13