Built‐in fast gather control network for efficient support of coherence protocols

Author:

Lodde Mario1,Roca Toni1,Flich José1

Affiliation:

1. Parallel Architectures GroupDISCAUniversitat Politècnica de ValènciaSpain

Funder

European Commission

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference24 articles.

1. Designing Network On-Chip Architectures in the Nanoscale Era

2. A Primer on Memory Consistency and Cache Coherence

3. Martin M. Hill M. Sorin D.: ‘Why on‐chip cache coherence is here to stay’.Duke University Department of ECE Technical Report TR‐2011‐1 August2011

4. The AMD Opteron Northbridge Architecture

5. Owen J.M. Hummel M. Meyer D. Keller J.:United states patent: 7069361 – system and method of maintaining coherency in a distributed communication system. June2006

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Integrated Coherence Prediction;ACM Transactions on Design Automation of Electronic Systems;2014-06

2. Runtime home mapping for effective memory resource usage;Microprocessors and Microsystems;2014-06

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