Subject
Artificial Intelligence,Computer Networks and Communications,Hardware and Architecture,Software
Reference28 articles.
1. C. Kim, D. Burger, S.W. Keckler, An adaptive, non-uniform cache structure for wire-delay dominated on-chip caches, in: Proc. of the 10th Intl Conference on Architectural Support for Programming Languages and Operating Systems, 2002.
2. A dynamic pressure-aware associative placement strategy for large scale chip multiprocessors;Hammoud;IEEE Comput. Architec. Lett.,2010
3. M. Lodde, J. Flich, M. Acacio, Heterogeneous noc design for efficient broadcast-based coherence protocol support, in: Proc. of the 6th Intl, Symposium on Networks on Chip 2012, 2012.
4. M. Lodde, T. Roca, J. Flich, Heterogeneous network design for effective support of invalidation-based coherency protocols, in: Proc. of the 2012 Interconnection Network Architecture: On-Chip, Multi-Chip Workshop, 2012.
5. M. Lodde, T. Roca, J. Flich, Built-in fast gather control network for efficient support of coherence protocols, in: to appear in IET Computers and Digital Techniques INA-OCMC 2012 Special Issue.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. DarkCache;ACM Transactions on Architecture and Code Optimization;2018-06-22