Low power multiplication scheme for FIR filter implementation on single multiplier CMOS DSP processors
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_19961298?crawler=true&mimetype=application/pdf
Reference7 articles.
1. Low power design for DSP: methodologies and techniques
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4. Mitra, S.K., and Kaiser, J.F.: ‘Handbook for digital signal processing’, (Wiley Interscience Publication New York USA 1993)
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