Fast and energy-efficient Manchester carry-bypass adders
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/ip-cds_20040807?crawler=true&mimetype=application/pdf
Reference14 articles.
1. A 1.5-V bootstrapped pass-transistor-based Manchester carry chain circuit suitable for implementing low-voltage carry look-ahead adders
2. A 440-ps 64-bit adder in 1.5-V/0.18-μm partially depleted SOI technology
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1. Carry look-ahead and ripple carry method based 4-bit carry generator circuit for implementing wide-word length adder;Microelectronics Journal;2023-10
2. Wide word‐length carry‐select adder design using ripple carry and carry look‐ahead method based hybrid 4‐bit carry generator;Engineering Reports;2023-06-29
3. FACCU: Enable Fast Accumulation for High-Speed DSP Systems;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-12
4. A high-speed 4-bit Carry Look-Ahead architecture as a building block for wide word-length Carry-Select Adder;Microelectronics Journal;2021-03
5. Performance Comparison of 64-bit Carry Look-Ahead Adders Using 32nm CMOS Technology;Materials Today: Proceedings;2017
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