Design and Performance Evaluation of Energy Efficient 8-Bit ALU At Ultra Low Supply Voltages Using FinFET With 20nm Technology

Author:

Vijay V.1,Shaik Sadulla2,Shekar P. Chandra3,Manoja P.1,Abhinaya R.1,Rachana M.4,Nikhil N.1

Affiliation:

1. Department of Electronics and Communication Engineering, Institute of Aeronautical Engineering, Hyderabad-500043, India

2. Department of Electronics and Communication Engineering, Vignan's Foundation for Science, Technology & Research, Unviersity,Vadlamudi-522213, India

3. Department of Electronics and Communication Engineering, MLR Institute of technology, Hyderabad-500043, India

4. Department of Electronics and Communication Engineering, Institute of Aeronautical Engineering, Hyderabad-500043, India

Abstract

ince last few years, the tiny size of MOSFET, that is less than tens of nanometers, created some operational problems such as increased gate-oxide leakage, amplified junction leakage, high sub-threshold conduction, and reduced output resistance. To overcome the above challenges, FinFET has the advantages of an increase in the operating speed, reduced power consumption, decreased static leakage current is used to realize the majority of the applications by replacing MOSFET. By considering the attractive features of the FinFET, an ALU is designed as an application. In the digital processor, the arithmetic and logical operations are executed using the Arithmetic logic unit (ALU). In this paper, power efficient 8-bit ALU is designed with Full adder (FA) and multiplexers composed of Gate diffusion input (GDI) which gained designer's choice for digital combinational circuit realization at minimum power consumption. The design is simulated using Cadence virtuoso with 20nm technology. Comparative performance analysis is carried out in contrast to the other standard circuits by taking the critical performance metrics such as delay, power, and power delay product (PDP), energy-delay product (EDP) metrics into consideration.

Publisher

North Atlantic University Union (NAUN)

Subject

Management, Monitoring, Policy and Law,Geography, Planning and Development

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Fake Currency Recognition System Using Edge Detection;2022 Interdisciplinary Research in Technology and Management (IRTM);2022-02-24

2. Universal Shift Register Designed at Low Supply Voltages in 20 nm FinFET Using Multiplexer;Intelligent Sustainable Systems;2021-08-27

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