Capacitor-less memory cell fabricated on nano-scale strained Si on a relaxed SiGe layer-on-insulator
Author:
Publisher
IOP Publishing
Subject
Materials Chemistry,Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
http://stacks.iop.org/0268-1242/28/i=4/a=045001/pdf
Reference32 articles.
1. Memory design using a one-transistor gain cell on SOI
2. A capacitorless 1T-DRAM technology using gate-induced drain-leakage (GIDL) current for low-power and high-speed embedded memory
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