Impact of technology scaling on analog and RF performance of SOI–TFET
Author:
Publisher
IOP Publishing
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,General Materials Science
Link
https://iopscience.iop.org/article/10.1088/2043-6262/6/4/045005/pdf
Reference28 articles.
1. CMOS scaling into the nanometer regime
2. Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFET's
3. Multiple-gate SOI MOSFETs
4. Multiple gate devices: advantages and challenges
5. A New Dual-Material Double-Gate (DMDG) Nanoscale SOI MOSFET—Two-Dimensional Analytical Modeling and Simulation
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