Ultrathin tin sulfide field-effect transistors with subthreshold slope below 60 mV/decade

Author:

Dragoman MirceaORCID,Dinescu Adrian,Avram Andrei,Dragoman Daniela,Vulpe Silviu,Aldrigo MartinoORCID,Braniste TudorORCID,Suman Victor,Rusu Emil,Tiginyanu IonORCID

Abstract

Abstract In this paper, we present for the first time a field-effect-transistor (FET) having a 10 nm thick tin sulfide (SnS) channel fabricated at the wafer scale with high reproducibility. SnS-based FETs are in on-state for increasing positive back-gate voltages up to 6 V, whereas the off-state is attained for negative back-gate voltages not exceeding −6 V, the on/off ratio being in the range 102–103 depending on FET dimensions. The SnS FETs show a subthreshold slope (SS) below 60 mV/decade thanks to the in-plane ferroelectricity of SnS and attaining a minimum value SS = 21 mV/decade. Moreover, the low SS values can be explained by the existence of a negative value of the capacitance of the SnS thin film up to 10 GHz (for any DC bias voltage between 1 and 5 V), with the minimum value being −12.87 pF at 0.1 GHz.

Funder

National Agency for Research and Development of the Republic of Moldova

European Commission

Romanian Ministry of Research, Innovation andDigitization, CNCS – UEFISCDI, within PNCDI III

Publisher

IOP Publishing

Subject

Electrical and Electronic Engineering,Mechanical Engineering,Mechanics of Materials,General Materials Science,General Chemistry,Bioengineering

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