Effect of ferroelectric parameters variation on the characteristics of polarity controllable–ferroelectric–field-effect transistors at elevated temperatures

Abstract

Abstract In the present work, detailed analyses are carried out to study the impact of temperature on the device performance of a single-gated polarity-controllable–ferroelectric–field-effect transistor (PC–FE–FET). Further, the impact of unintentional variations (≤±5%) in ferroelectric (FE) material parameters are extensively investigated. Various device characteristics are studied by implementing the baseline approach. Due to the integration of an FE layer, the proposed device shows remarkable improvements in current drivability, transconductance and transconductance generation factor, and even at elevated temperatures, sub-60 subthreshold swing values are achieved in comparison to the conventional polarity-controllable–FET (PC-FET) for both n- and p-modes of operation. It is demonstrated that the PC–FE–FET shows remarkable stability towards variations in FE parameters.