Author:
Zeng Wanshu,Yu Yao,Xia Weisheng
Abstract
Abstract
We proposed a cold capacitively-coupled-plasma jet method to deposit the seed layer in the inner wall of Through-silicon-vias (TSVs) directly. Comparison experiments were carried out to optimize the process parameters. The testing results were discussed and proved the potential application of this technique in the metallization of TSVs in 2.5D integration technology.
Subject
General Physics and Astronomy
Reference10 articles.
1. Wafer level processing of integrated passive components using polyimide or polybenzoxazole/copper multilayer technology;Zoschke;IEEE Transactions on Advanced Packaging,2010
2. Microelectro nic Device & Technology;Ddeng;3D Package and Its Latest Research,2010
3. High aspect ratio Bosch etching of sub-0.25 μm trenches for hyperintegration applications;Wang;Journal of Vacuum Science Technology B: Microelectronics and Nanometer Structures,2007
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Approaches for a Solely Electroless Metallization of Through-Glass Vias;2022 IEEE 72nd Electronic Components and Technology Conference (ECTC);2022-05