Cryogenic characterization of 180 nm CMOS technology at 100 mK
Author:
Publisher
IOP Publishing
Subject
Mathematical Physics,Instrumentation
Link
https://iopscience.iop.org/article/10.1088/1748-0221/15/06/P06026/pdf
Reference10 articles.
1. Cryo-CMOS Circuits and Systems for Quantum Computing Applications
2. A front-end electronic system for large arrays of bolometers
3. A review of recent MOSFET threshold voltage extraction methods
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1. Investigation of long channel bulk MOSFETs threshold voltage model down to 10 mK and key analog parameters at 4 K;International Journal of Numerical Modelling: Electronic Networks, Devices and Fields;2024-05
2. Overview of Cryogenic Operation in Nanoscale Technology Nodes;2023 IEEE 14th Latin America Symposium on Circuits and Systems (LASCAS);2023-02-27
3. Revisiting Dynamic Logic—A True Candidate for Energy-Efficient Cryogenic Operation in Nanoscaled Technologies;IEEE Transactions on Circuits and Systems I: Regular Papers;2023
4. Parameter extraction in a 65nm nMOSFET technology from 300 K down to 3.8 K;2022 IEEE Latin American Electron Devices Conference (LAEDC);2022-07-04
5. Cryogenic Calorimetric Signal Readout with 180nm CMOS at 20 mK;2022 IEEE 15th Workshop on Low Temperature Electronics (WOLTE);2022-06-06
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