A 12 bit 40 MSPS SAR ADC with a redundancy algorithm and digital calibration for the ATLAS LAr calorimeter readout
Author:
Publisher
IOP Publishing
Subject
Mathematical Physics,Instrumentation
Link
http://stacks.iop.org/1748-0221/11/i=01/a=C01030/pdf
Reference8 articles.
1. All-MOS charge redistribution analog-to-digital conversion techniques. I
2. SAR ADC Algorithm with Redundancy and Digital Error Correction
3. A 14b 40MS/s Redundant SAR ADC with 480MHz Clock in 0.13pm CMOS
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1. Analog-to-digital converters and time-to-digital converters for high-energy physics experiments;Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment;2023-12
2. A 16 bit 200 kS/s successive approximation register ADC with foreground on-chip self-calibration;IEICE Electronics Express;2020-05-25
3. A 16-bit 8-MS/s SAR ADC with a foreground calibration and hybrid-charge-supply power structure;IEICE Electronics Express;2020-05-25
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