SAR ADC Algorithm with Redundancy and Digital Error Correction-Reference-Cited by-同舟云学术

SAR ADC Algorithm with Redundancy and Digital Error Correction

Published:2010 Issue:2 Volume:E93-A Page:415-423
ISSN:0916-8508
Container-title:IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
language:en
Short-container-title:IEICE Trans. Fundamentals

Author:

OGAWA Tomohiko¹,KOBAYASHI Haruo¹,TAKAHASHI Yosuke¹,TAKAI Nobukazu¹,HOTTA Masao²,SAN Hao²,MATSUURA Tatsuji³,ABE Akira³,YAGI Katsuyoshi³,MORI Toshihiko³

Affiliation:

1. Electronic Engineering Department, Graduate School of Engineering, Gunma University

2. Department of Information Network Engineering, Tokyo City University

3. Semiconductor Technology Academic Research Center (STARC)

Publisher

Institute of Electronics, Information and Communications Engineers (IEICE)

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Signal Processing

Link

http://www.jstage.jst.go.jp/article/transfun/E93.A/2/E93.A_2_415/_pdf

Reference13 articles.

1. [1] ISSCC Short Course, Automotive Technology and Circuits, Feb. 2005.

2. [2] M. Hesener, T. Eichler, A. Hanneberg, D. Herbison, F. Kuttner, and H. Wenske, “A 14b 40MS/s redundant SAR ADC with 480MHz clock in 0.13µm CMOS,” Tech. Digest of ISSCC, Feb. 2007.

3. [3] F. Kuttner, “A 1.2V 10b 20MS/S non-binary successive approximation ADC in 0.13µm CMOS,” Tech. Digest of ISSCC, Feb. 2002.

4. [4] M. Hotta, A. Hayakawa, N. Zhao, Y. Takahashi, and H. Kobayashi, “SAR ADC architecture with digital error correction,” IEEJ Int. Analog VLSI Workshop, Hangzhou, China, Nov. 2006.

5. [5] S. Shimokura, M. Hotta, Y. Takahashi, and H. Kobayashi, “Conversion rate improvement of SAR ADC with digital error correction,” IEEJ Int. Analog VLSI Workshop, Limerick, Ireland, Nov. 2007.

Cited by 21 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A non-pipelined ADC with a GM-R amplifier;Microelectronics Journal;2023-07

2. How the Author's Group Came Up with Ideas in Analog/Mixed-Signal Circuit and System Area;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2023

3. Asynchronous capacitive SAR ADC based on Hopfield network;IEICE Electronics Express;2022-09-25

4. NEW METHOD OF ON-LINE SUCCESSIVE-APPROXIMATION ADC CALIBRATION;Informatyka, Automatyka, Pomiary w Gospodarce i Ochronie Środowiska;2022-06-30

5. A 12 Bit 8 GS/s Randomly-Time-Interleaved SAR ADC with Adaptive Mismatch Correction;2021 IEEE International Symposium on Circuits and Systems (ISCAS);2021-05