Analytical model including the fringing-induced barrier lowering effect for a dual-material surrounding-gate MOSFET with a high-κ gate dielectric
Author:
Publisher
IOP Publishing
Subject
General Physics and Astronomy
Reference20 articles.
1. Multiple-gate SOI MOSFETs
2. Online degradation model based on process-stress accelerated test
3. Compact modeling of the effects of parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric nanoscale SOI MOSFETs
4. A new compact subthreshold behavior model for dual-material surrounding gate (DMSG) MOSFETs
5. Analytical Modeling and Simulation of Dual-Material Surrounding-Gate Metal–Oxide–Semiconductor Field Effect Transistors with Single-Halo Doping
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A two-dimensional analytical subthreshold behavior model for junctionless dual-material cylindrical surrounding-gate MOSFETs;Chinese Physics B;2014-03
2. Quasi-two-dimensional threshold voltage model for junctionless cylindrical surrounding gate metal-oxide-semiconductor field-effect transistor with dual-material gate;Chinese Physics B;2014-01
3. Interfacial characteristics of Al/Al2O3/ZnO/n-GaAs MOS capacitor;Chinese Physics B;2013-07
4. Study of the SOI MOSFET characteristics of high-k gate dielectric with quantum effect;Acta Physica Sinica;2012
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