Author:
Sikarwar Vandna,Khandelwal Saurabh,Akashe Shyam
Subject
Electrical and Electronic Engineering
Reference13 articles.
1. D. J. Frank, R. H. Dennard, E. Nowak, P. M. Solomon, Yuan Taur, Hen-Sum Philip Wong, “Device scaling limits of Si MOSFETs and their application dependencies,” Proc. IEEE 89, No. 3, 259 (Mar. 2001). DOI: 10.1109/5.915374.
2. V. Kursun and E. G. Friedman, Multi-Voltage CMOS Circuit Design (Wiley, Hoboken, NJ, 2006). 242 p.
3. D. M. Fried, The Design, Fabrication and Characterization of Independent-Gate Finfets (Cornell University, 2004). 184 p.
4. M. Rostami and K. Mohanram, “Novel dual-Vth independent-gate FinFET circuits,” in Proc. of 15th IEEE Design Automation Conf. (ASP-DAC), 18–21 Jan. 2010, Asia and South Pasific (2010), pp. 867–872. DOI: 10.1109/ASPDAC.2010.5419680.
5. E. Chin, M. Dunga, B. Nikolic, “Design trade-offs of a 6T FinFET SRAM cell in the presence of variations,” IEEE. Symp. VLSI Circuits (2006), pp. 445–449.
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