Author:
Kwiatkowski Paweł,Różyc Krzysztof,Sawicki Marek,Jachna Zbigniew,Szplet Ryszard
Abstract
Abstract
A new time interval/frequency generator with a jitter below 5 ps is described. The time interval generation mechanism is based on a phase shifting method with the use of a precise DDS synthesizer. The output pulses are produced in a Spartan-6 FPGA device, manufactured by Xilinx in 45 nm CMOS technology. Thorough tests of the phase shifting in a selected synthesizer are performed. The time interval resolution as low as 0.3 ps is achieved. However, the final resolution is limited to 500 ps to maximize precision. The designed device can be used as a source of high precision reference time intervals or a highly stable square wave signal of frequency up to 50 MHz.
Reference12 articles.
1. FPGA vernier digital - to - time converter with ps resolution and minutes operation range I Reg Papers;Chen;IEEE Trans Circuits Syst,2010
2. Low - jitter wide - range integrated time interval delay generator based on combination of period counting and capacitor charging;Klepacki;Rev Sci Instrum,2015
3. An eight - channel - ps precision timestamps - based time interval counter in FPGA chip Instrum Meas;Szplet;IEEE Trans,2016
4. Design and implementation of an FPGA - based data timing formatter;Chen;J Electron Test,2015
5. ps equivalent resolution interpolating time counter based on multiple coding lines Meas;Szplet;Sci Technol,2013
Cited by
14 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献