Affiliation:
1. School of Automation Engineering, University of Electronic Science and Technology of China , Chengdu 611731, China
Abstract
This paper proposes a new high-resolution digital-to-time converter architecture based on a field programmable gate array and digital-to-analog converter (DAC). A real-time algorithm of time–-amplitude mapping is proposed, which converts the vertical resolution of the DAC to the timing resolution and realizes the ultra-high resolution timing signal generation. Moreover, the relationship between the timing resolution and the vertical resolution and the sampling rate of DAC is discussed. Based on this, arbitrarily distributed random timing signals and editable timing signal sequence functions are realized. This method is verified in the experiment on Xilinx XCKU040 and Texas Instrument DAC37J82. Furthermore, a timing resolution of 1 ps is realized. A time range of 4.2 ns to 999 s, an editable sequence length of 1–128k, and excellent nonlinear performance are achieved. In addition, functions for arbitrarily distributed random timing signals and signal bursts are tested. This method can be flexibly deployed on existing hardware and satisfy almost all test requirements.
Funder
National Natural Science Foundation of China