1. A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation
2. Cohen, N., Sriram, T. S., Leland, N., Moyer, D., Butler, S. and Flatley, R. “Soft Error Considerations for Deep-Submicron CMOS Circuit Applications,”. International Electron Devices Meeting Technical Digest. December5–81999, Washington, DC, USA. pp.315–318.
3. Das, D. and Touba, N. A. “Synthesis of Circuits With Low-Cost Concurrent Error Detection Based on Bose-lin Codes,”. VLSI Test Symposium. 28 April–1 May1998, Princeton, NJ, USA. pp.309–315.
4. SPaRre: selective partial replication for concurrent fault-detection in FSMs