Performance Evaluation of Digital Comparator Using Different Logic Styles-Reference-Cited by-同舟云学术

Performance Evaluation of Digital Comparator Using Different Logic Styles

Author:

Mukherjee Dwip Narayan¹,Panda Saradindu²,Maji Bansibadan³

Affiliation:

1. Department of Electronics and Communication Engineering, Bankura Unnayani Institute Engineering , Bankura, India

2. Department of Electronics and communication Engineering, Narula Institute of Technology , Kolkata, India

3. Department of Electronics and communication Engineering, National Institute of Technology , Durgapur, India

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering,Computer Science Applications,Theoretical Computer Science

Link

Reference8 articles.

1. S. Kang and Y. Leblebici . CMOS Digital Integrated Circuit, Analysis and Design , 3rd ed. New Delhi: Tata McGraw-Hill, 2003, pp. 295–302.

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