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2. Design of Pepped-up Inexact MAC (IMAC) Unit for DSP Applications;neelima;IEEE International Conference on Science Technology Engineering and Management (ICSTEM'17) Kalaignarkarunanidhi Institute of Technology Coimbatore march,2017
3. Accuracy Configurable Floating Point Multiplier for Error Tolerant Applications;kumar;IEEE Sponsored 3rd International conference on Innovationsin Information Embedded and Communication Systems ICIIECS'16,2016
4. Modified Binary Multiplier Architecture to Achieve Reduced Latency and Hardware Utilization
5. Design of energy efficient and low power asynchronous 8*8 multiplier;maheswari;Advances in Natural and Applied Sciences,2017