An area efficient, high-frequency digital built-in self-test for analogue to digital converter
Author:
Affiliation:
1. Department of Electronics Engineering, MIT-Campus, Anna University, Chennai, India
Funder
University Grants Commission
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
https://www.tandfonline.com/doi/pdf/10.1080/00207217.2018.1440431
Reference17 articles.
1. Design Procedure and Selection of TIQ Comparators for Flash ADCs
2. A Code Width Built-In-Self Test Circuit for 8-bit Pipelined ADC
3. Accurate and Efficient On-Chip Spectral Analysis for Built-In Testing and Calibration Approaches
4. A 10-bit 2.5-MS/s SAR ADC with 60.46 dB SNDR in 0.13-μm CMOS technology
5. Determination of error in nonlinearity estimation in an A/D converter with triangular wave input
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2. Efficient Design of ADC BIST with an Analog Ramp Signal Generation and Digital Error Estimation;Journal of Circuits, Systems and Computers;2019-02-24
3. Error Detection of Data Conversion in Flash ADC using Code Width Based Technique;Procedia Computer Science;2019
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