A CMOS switch-capacitor 14-bit 100 Msps pipeline ADC with over 90 dB SFDR-Reference-Cited by-同舟云学术

A CMOS switch-capacitor 14-bit 100 Msps pipeline ADC with over 90 dB SFDR

Published:2013-01 Issue:1 Volume:100 Page:62-71
ISSN:0020-7217
Container-title:International Journal of Electronics
language:en
Short-container-title:International Journal of Electronics

Author:

Cai Hua,Li Ping

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering

Link

http://www.tandfonline.com/doi/pdf/10.1080/00207217.2012.682486

Reference12 articles.

1. A 14-bit 125 MS/s IF/RF Sampling Pipelined ADC With 100 dB SFDR and 50 fs Jitter

2. A 100-dB SFDR 80-MSPS 14-Bit 0.35-$ muhbox m$BiCMOS Pipeline ADC

3. Chiu , Y . Gray, P., and Nikolic, B. (2004), ‘A 14-b 12-MS/s CMOS Pipelined ADC with Over 100-dB SFDR’, inIEEE Journal of Solid-State Circuits, 2139–2151

4. Lee , B . and Min, B. (2008), ‘A 14b lOOMS/s Pipelined ADC with a Merged Active S/H and First MDAC’, inIEEE International Solid-State Circuits Conference,pp.247–249

5. A CMOS 15-bit 125-MS/s Time-Interleaved ADC With Digital Background Calibration

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