Comparative Review of MAC Architectures
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Publisher
Springer Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-16-1048-6_3
Reference18 articles.
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4. Warrier R, Vun CH, Zhang W (2014) A low-power pipelined MAC architecture using Baugh-Wooley based multiplier. In: IEEE 3rd Global Conference on Consumer Electronics (GCCE), Tokyo, pp 505–506
5. Smith SC (2005) Development of a large word-width high-speed asynchronous multiply and accumulate unit. Integr VLSI J 39(1):12–28
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