Recent Cases in Advanced Micro/Nanoelectronics, Microsystems and MEMS Devices and Technologies
Author:
Budiman Arief Suriadi
Publisher
Springer Singapore
Reference142 articles.
1. Banerjee, K., Souri, S.J., Kapur, P., Saraswat, K.C.: 3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration. Proc. IEEE 89(5), 602–633 (2001) 2. Knickerbocker, J.U., Andry, P.S., Buchwalter, L.P., Deutsch, A., Horton, R.R., Jenkins, K.A., Kwark, Y.H., McVicker, G., Patel, C.S., Polastre, R.J., Schuster, C.D.: Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection. IBM J. Res. Dev. 49(4.5), 725–753 (2005) 3. Savastiouk, S.: Semetech 3D ICs Workshop. San Diego, CA (2008) 4. Thompson, S.E., Sun, G., Choi, Y.S., Nishida, T.: Uniaxial-process-induced strained-Si: extending the CMOS roadmap. IEEE Trans. Electron Devices 53(5), 1010–1020 (2006) 5. Budiman, A.S., Shin, H.A.S., Kim, B.J., Hwang, S.H., Son, H.Y., Suh, M.S., Chung, Q.H., Byun, K.Y., Tamura, N., Kunz, M., Joo, Y.C.: Measurement of stresses in Cu and Si around through-silicon via by synchrotron X-ray microdiffraction for 3-dimensional integrated circuits. Microelectron. Reliab. 52(3), 530–533 (2012)
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