Power and Delay Efficient ALU Using Vedic Multiplier-Reference-Cited by-同舟云学术

Power and Delay Efficient ALU Using Vedic Multiplier

Published:2020 Issue: Volume: Page:703-711
ISSN:1876-1100
Container-title:Lecture Notes in Electrical Engineering
language:
Short-container-title:

Author:

Lachireddy Dhanunjay,Ramesh S. R.

Publisher

Springer Singapore

Link

http://link.springer.com/content/pdf/10.1007/978-981-15-5558-9_61

Reference10 articles.

1. Jadhav K, Vibhute A, Iyer S, Dhanabal R (2015) Novel vedic mathematics based ALU using application specific reversibility. In: 2015 IEEE 9th international conference on intelligent systems and control (ISCO), pp 1–5. IEEE

2. Morrison M, Ranganathan N (2011) Design of a reversible ALU based on novel programmable reversible logic gate structures. In: 2011 IEEE computer society annual symposium on VLSI (ISVLSI), pp 126–131. IEEE

3. Nagamani A, Jayashree H, Bhagyalakshmi H (2011) Novel low power comparator design using reversible logic gates. Indian J Comput Sci Eng (IJCSE) 2(4):566–574

4. Patil HP, Sawant S (2015) FPGA Implementation of conventional and vedic algorithm for energy efficient multiplier. In: 2015 International conference on energy systems and applications, pp 583–587. IEEE

5. Gokul PR, Prabhu E, Mangalam H (2014) Performance comparison of multipliers based on square and multiply and Montgomery algorithms. In: International conference on green computing, communication and electrical engineering (ICGCCEE), pp 1–5

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Systematic exploration of N-bit Vedic multipliers: A roadmap of technological approaches in pursuit of future trends;Nano Communication Networks;2024-12

2. Development of Power-Delay Product Optimized ASIC-Based Computational Unit for Medical Image Compression;Technologies;2024-07-29

3. Design of a Low-power Computational Unit using a Pipelined Vedic Multiplier;2023 International Conference for Advancement in Technology (ICONAT);2023-01-24

4. Efficient Square Root Computation–An Analysis;Lecture Notes in Electrical Engineering;2022

5. Analytical Variable Execution of GDI Vedic Multiplier Using FinFET Full Adder;Lecture Notes in Electrical Engineering;2022