Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Reference16 articles.
1. D’Amico, S., Cocciolo, G., Spagnolo, A., et al. (2014). A 7.65-mW 5-bit 90-nm 1-Gs/s folded interpolated ADC without calibration. IEEE Instrumentation and Measurement, 63(2), 295–303.
2. Fang, B. N., & Wu, J. T. (2013). A 10-bit 300-MS/s pipelined ADC with digital calibration and digital bias generation. IEEE Solid-State Circuits, 48(3), 670–683.
3. Jia, H. Y., Chen, G. C., & Zhang, H. (2008). A high performance low power 12-bit 40 MS/s pipelined ADC. IEICE Electronics Express, 5(11), 400–404.
4. Xiong, Zh. X., Cai, M., & He, X. Y. (2013). Digital background calibration for a 14-bit 100-MS/s pipelined ADC using signal-dependent dithering. In IEEE international conference of electron devices and solid-state circuits, 2013 (pp. 1–2).
5. Shu, T. H., Song, B. S. & Bacrania, K. (1994). A 13-bit 10-MHz ADC background-calibrated with real-time oversampling calibrator. In Symposium on VLSI circuits, 1994 (pp. 13–14).
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