A New Continuous Time Offset and Gain Calibration Strategy for Open-loop Residue Amplifiers of ADC
Author:
Affiliation:
1. Urmia University,Microelectronic Research Laboratory,Urmia,Iran
2. Politecnica de Madrid,Escuela Tecnica Superior de Ingenieros de Telecomunicacion,Madrid,España
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10203036/10203110/10203208.pdf?arnumber=10203208
Reference24 articles.
1. A foreground-liked continuous-time offset cancellation strategy for open-loop inter-stage amplifiers in high-resolution ADCs
2. A calibration technique based on sub-stages’ weights of pipelined ADC
3. A 12-bit 75-MS/s pipelined ADC using open-loop residue amplification
4. Background interstage gain calibration technique for pipelined ADCs
5. A 14-bit 20-MS/s Pipelined ADC With Digital Distortion Calibration
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