A 5–7 GHz current reuse and gm-boosted common gate low noise amplifier with LC based ESD protection in 32 nm CMOS-Reference-Cited by-同舟云学术

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A 5–7 GHz current reuse and gm-boosted common gate low noise amplifier with LC based ESD protection in 32 nm CMOS

Published:2016-12-26 Issue:3 Volume:90 Page:573-589
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Ankathi Sriharsha,Vignan Sriramula,Athukuri Srikanth,Mohan Smrithi,Balamurugan Karthigha,Nirmala Devi M.

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

http://link.springer.com/content/pdf/10.1007/s10470-016-0915-x.pdf

Reference23 articles.

1. Muhammad, K., & Rezaul Hassan, S. M. (2012). A 3–5 GHz Current-Reuse gm-boosted CG LNA for ultra wide band in 130 nm CMOS process. IEEE Transaction on Very Large Scale Integration (VLSI) Systems, 20(3), 400–409.

2. Tsai, Ming-Hsien, Hsu, Shawn S. H., Fu lung, H., Fu lung, H., Chewn-Pu, I., & Tzu-Jin, Y. (2013). Design of 60 GHz low noise amplifier with low NF and robust ESD protection in 65 nm CMOS. IEEE Transaction on Microwave Theory and Techniques, 61(1), 553–561.

3. Tsai, Ming-Hsien, Hsu, Shawn S. H., Fu lung, H., & Chewn-Pu, I. (2011). ESD protected K-band low noise amplifier using RF junction varactors in 65 nm CMOS. IEEE Transaction on Microwave Theory and Techniques, 59(12), 3455–3462.

4. Rafaella, F., Fernado, S., & Eduardo, P. (2014). Most moderate–weak-inversion region as the optimum Design zone for CMOS 2.4 GHz CS LNAs. IEEE Transaction on Microwave Theory and Techniques, 62(3), 556–566.

5. Schell, Z., Hosein A. -R., Mustapha C. E. Y., (2012). A high gain low power 2–14 GHz UWB CMOS LNA for wireless receivers. International Journal of Electronics and Communication (AEU), 66(9), 727–731.

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1. Quad path, CG-CS resistive feedback LNA architecture for 25–35 GHz band;Microelectronic Engineering;2023-07

2. A triple path noise cancellation LNA with transformer output using 45 nm CMOS technology;Journal of Electrical Engineering;2022-09-01

3. A common-gate cascaded with cascoded self-bias common source approach for 3.1–10.6 GHz UWB low noise amplifier;International Journal of Information Technology;2022-05-28

4. Design of ESD Protection Circuits for LNA Using 65-nm CMOS Technology;2021 International Conference on Advances in Computing and Communications (ICACC);2021-10-21

5. Design and performance analysis of low power LNA with variable gain current reuse technique;Analog Integrated Circuits and Signal Processing;2021-05-08

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