Author:
Ruan Wenjia,Spear Michael
Publisher
Springer Berlin Heidelberg
Reference25 articles.
1. Attiya, H., Epstein, L., Shachnai, H., Tamir, T.: Transactional contention management as a non-clairvoyant scheduling problem. In: Proceedings of the 25th ACM Symposium on Principles of Distributed Computing, Denver, CO, August 2006
2. Calciu, I., Gottschlich, J., Shpeisman, T., Pokam, G., Herlihy, M.: Invyswell: A hybrid transactional memory for haswell’s restricted transactional memory. In: Proceedings of the 23rd International Conference on Parallel Architectures and Compilation Techniques, Edmonton, AB, Canada, August 2014
3. Calciu, I., Shpeisman, T., Pokam, G., Herlihy, M.: Improved single global lock fallback for best-effort hardware transactional memory. In: Proceedings of the 9th ACM SIGPLAN Workshop on Transactional Computing, Salt Lake City, UT, March 2014
4. Dalessandro, L., Carouge, F., White, S., Lev, Y., Moir, M., Scott, M., Spear, M.: Hybrid NOrec: A case study in the effectiveness of best effort hardware transactional memory. In: Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems Newport Beach, CA, March 2011
5. Dalessandro, L., Spear, M., Scott, M.L.: NOrec: streamlining stm by abolishing ownership records. In: Proceedings of the 15th ACM Symposium on Principles and Practice of Parallel Programming, Bangalore, India, January 2010
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