Funder
Fundação de Amparo à Pesquisa do Estado de São Paulo
Center for Computational Engineering and Sciences
CNPq
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Computational Theory and Mathematics,Hardware and Architecture,Signal Processing
Cited by
6 articles.
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1. On the impact of mode transition on phased transactional memory performance;Journal of Parallel and Distributed Computing;2023-03
2. Using Barrier Elision to Improve Transactional Code Generation;ACM Transactions on Architecture and Code Optimization;2022-07-06
3. Improving Phased Transactional Memory via Commit Throughput and Capacity Estimation;2021 IEEE 33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD);2021-10
4. Adaptive Versioning in Transactional Memory Systems;Algorithms;2021-05-31
5. Using OpenMP to Detect and Speculate Dynamic DOALL Loops;OpenMP: Portable Multi-Level Parallelism on Modern Systems;2020