1. Fuller E, Caffrey M, Blain P, et al. Radiation testing update, SEU mitigation, and availability analysis of the virtex FPGA for space reconfigurable computing. In: Clive D, Paul M, John C, et al., eds. IEEE Nuclear and Space Radiation Effects Conference (NSREC). Reno Nevada: IEEE, 2000. 457–464
2. Carmichael C. Triple module redundancy design techniques for virtex FPGAs. 2006. Online available at: http://www.xilinx.com/support/documentation/application_notes/xapp197.pdf
3. Carmichael C, Caffrey M, Salazar A. Correcting single event upset through Virtex partial configuration. 2000. Online available at: http://www.xilinx.com/support/documentation/application_notes/xapp216.pdf
4. Violante M, Sterpone L, Ceschia M, et al. Simulation-based analysis of SEU effects in SRAM-based FPGAs. IEEE Trans Nucl Sci, 2004, 51: 3354–3359
5. Keith M, Michael C, Paul G, et al. SEU-induced persistent error propagation in FPGAs. IEEE Trans Nucl Sci, 2005, 52: 2438–2445