Reference15 articles.
1. R. M. Tomasulo, An Efficient Algorithm for Exploiting Multiple Arithmetic Units, IBM Journal of Research and Development, Vol 11(1), Jan. 1967, p25-33
2. Y. N. Patt, W. W. Hwu, M. C. Shebanow, HPS, a New Microarchitecture: Rationale and Introduction, in Proceeding of the 18th International Microprogramming Workshop, Asilomar, Dec. 1985.
3. Y. N. Patt, S. W. Melvin, W. W. Hwu, M. C. Shebanow, HPS, Critical Issues Regarding HPS, a High Performance Microarchitecture, in Proceeding of the 18th International Microprogramming Workshop, Asilomar, Dec. 1985.
4. F. Anceau, The Architecture of Microprocessors, Addison-Wesley, 1986
5. N. Tredennick, Microprocessor Logic Design, Digital Press, 1986
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