1. Towards Fault Tolerance and Resilience in the Sequential Codelet Model;Communications in Computer and Information Science;2024
2. Towards a Formal Account on Negative Latency;Bridging the Gap Between AI and Reality;2023-12-14
3. r-map: Relating Implementation and Specification in Hardware Refinement Checking;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-12
4. Improved Models for Policy-Agent Learning of Compiler Directives in HLS;2023 IEEE High Performance Extreme Computing Conference (HPEC);2023-09-25
5. HyperGRAF: Hyperdimensional Graph-Based Reasoning Acceleration on FPGA;2023 33rd International Conference on Field-Programmable Logic and Applications (FPL);2023-09-04