3-D analytical modeling of high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual-material bottom gate for suppressing short channel effects-Reference-Cited by-同舟云学术

3-D analytical modeling of high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual-material bottom gate for suppressing short channel effects

Published:2017-05-23 Issue:3 Volume:16 Page:631-639
ISSN:1569-8025
Container-title:Journal of Computational Electronics
language:en
Short-container-title:J Comput Electron

Author:

Banerjee Pritha^ORCID,Sarkar Subir Kumar

Funder

University Grants Commission

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,Modeling and Simulation,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Link

http://link.springer.com/article/10.1007/s10825-017-1002-y/fulltext.html

Reference18 articles.

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2. Chiang, T.K., Chen, M.-L.: A new two-dimensional analytical model for short-channel symmetrical dual-material double-gate metal-oxide-semiconductor field effect transistors. Jpn. J. Appl. Phys. 46(6A), 3283–3290 (2007)

3. Deb, S., Singh, N.B., Islam, N., Sarkar, S.K.: Work function engineering with linearly graded binary metal alloy gate electrode for short-channel SOI MOSFET. IEEE Trans. Nanotechnol. 11(3), 472–478 (2012)

4. Cartwright, J.: Intel enters the third dimension. Nature (2011). doi: 10.1038/news.2011.274 . http://www.nature.com/news/2011/110506/full/news.2011.274.html

5. Jin, L., Hongxia, L., Bo, Y., Lei, C., Bin, L.: A two-dimensional analytical model of fully depleted asymmetrical dual material gate double-gate strained-Si MOSFETs. J. Semicond. 32(4), 044005 (2011)

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