Two Novel Ultra-Low-Power SRAM Cells with Separate Read and Write Path-Reference-Cited by-同舟云学术

Two Novel Ultra-Low-Power SRAM Cells with Separate Read and Write Path

Published:2018-05-29 Issue:1 Volume:38 Page:287-303
ISSN:0278-081X
Container-title:Circuits, Systems, and Signal Processing
language:en
Short-container-title:Circuits Syst Signal Process

Author:

Naghizadeh Shokoufeh,Gholami Mohammad^ORCID

Publisher

Springer Science and Business Media LLC

Subject

Applied Mathematics,Signal Processing

Link

http://link.springer.com/article/10.1007/s00034-018-0858-9/fulltext.html

Reference14 articles.

1. Haghdad K, Parametric yield of VLSI systems under variability. Analysis and design solutions, PhD dissertation, Electrical and Computer Engineering, University of Waterloo, (2011)

2. C.B. Kushwah, S.K. Vishvakarma, D. Dwivedi, Single single-ended boost-less (SE-BL) 7T process tolerant SRAM design in sub-threshold regime for ultra-low-power applications. Circuits Syst. Signal Process. 35, 385–407 (2016)

3. K. Mehrabi, B. Ebrahimi, A. Afzali-Kusha, A robust and low power 7T SRAM cell design, in 18th CSI International Symposium on Computer Architecture and Digital Systems (CADS), 2015. https://doi.org/10.1109/CADS.2015.7377782

4. M. Moghaddam, S. Timarchi, M.H. Moaiyeri, M. Eshghi, An ultra-low-power 9T SRAM cell based on threshold voltage techniques. Circuits Syst. Signal Process. 35, 1437–1455 (2016)

5. A. Pal, Low-Power VLSI Circuits and Systems (Springer, New Delhi, 2015)

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