A Novel High Speed, Low Power, and Symmetrical Phase Frequency Detector with Zero Blind Zone and π Phase Difference Detection Ability
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
http://link.springer.com/content/pdf/10.1007/s00034-019-01312-w.pdf
Reference22 articles.
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2. P. Arya, D. Jangid, S.P. Tiwari, M. Arrawatia, Design and analysis of a symmetric phase locked loop for low frequencies in 180 nm technology, in 2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS) (IEEE, 2017), pp. 1–6
3. A. Dhiman, T. Sharma, B. Kaur, Design and performance analysis of phase frequency detector for high speed application, in 2018 2nd International Conference on Inventive Systems and Control (ICISC) (IEEE, 2018), pp. 161–168
4. N. Ghaderi, H. Erfani-jazi, M. Mohseni-Mirabadi, A low noise, low power phase-locked loop, using optimization methods. J. Electr. Comput. Eng. 2016, 1–9 (2016)
5. M. Gholami, Phase detector with minimal blind zone and reset time for GSamples/s DLLs. Circuits Syst. Signal Process. 36, 3549–3563 (2017)
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