A New Low-Power Charge Pump with a Glitch-Free PFD for Speedup the Acquisition Process of a PLL in 65 nm CMOS Technology
Author:
Publisher
Springer Science and Business Media LLC
Subject
Applied Mathematics,Signal Processing
Link
https://link.springer.com/content/pdf/10.1007/s00034-020-01608-2.pdf
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3. R. J. Baker, C. Boyce, Circuit design, layout, and simulation. IEEE Press Series on Microelectronic Systems (2005)
4. W.-H. Chen, M.E. Inerowicz, B. Jung, Phase frequency detector with minimal blind zone for fast frequency acquisition. IEEE Trans. Circuits Syst. II Express Briefs 57(12), 936–940 (2010)
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