Design of two-phase sinusoidal power clock and clocked transmission gate adiabatic logic circuit

Author:

Wang Pengjun,Yu Junjun

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering

Reference12 articles.

1. Wu Xunwei, Hang Guoqing. Principle of adiabatic computing and CMOS circuits with energy recovery. Chinese J. of Computers, 23(2000)7, 779–785, (in Chinese). 吴训威, 杭国强. 绝热计算原理与能量恢复型CMOS电路. 计算机学报, 23(2000)7, 779–785.

2. Li Xiaomin, Qiu Yulin, Chen Chaoshu. A type of bootstrapped charge-recovery logic circuit. Chinese Journal of Semiconductors, 21(2000)9, 887–891, (in Chinese). 李晓民, 仇玉林, 陈潮枢. 一种利用自举效应的Charge-Recovery 逻辑电路. 半导体学报, 21(2000)9, 887–891.

3. Hang Guoqiang, Wu Xunwei. Adiabatic CMOS switching circuits adopting two-phase power clock supply and avoiding floating output. Chinese Journal of Semiconductors, 22(2001)3, 366–372, (in Chinese). 杭国强, 吴训威. 采用二相功率时钟的无悬空输出绝热CMOS 电路. 半导体学报, 22(2001)3, 366–372.

4. Hang Guoqiang. Adiabatic CMOS gate and adiabatic circuit design for low-power application. Proceedings of the 2005 Asia and South Pacific Design Automation Conference, Shanghai, China, January 18–21, 2005, vol.2, 803–808.

5. H. P. Chen, J. B. Kuo. A 0.8V CMOS TSPC adiabatic DCVS logic circuit with the bootstrap technique for low-power VLSI. Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, Tel Aviv, Israel, December 13–15, 2004, 175–178.

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1. Clock System Architecture for Digital Circuits;International Conference on Intelligent Computing and Smart Communication 2019;2019-12-20

2. Low-Power Adiabatic Computing with Improved Quasistatic Energy Recovery Logic;VLSI Design;2013-11-07

3. Design of a DTCTGAL circuit and its application;Journal of Semiconductors;2009-11

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