Heuristic for Two-Level Cache Hierarchy Exploration Considering Energy Consumption and Performance-Reference-Cited by-同舟云学术

Heuristic for Two-Level Cache Hierarchy Exploration Considering Energy Consumption and Performance

Published:2006 Issue: Volume: Page:75-83
ISSN:0302-9743
Container-title:Lecture Notes in Computer Science
language:
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Author:

Silva-Filho A. G.,Cordeiro F. R.,Sant’Anna R. E.,Lima M. E.

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/11847083_8.pdf

Reference14 articles.

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2. Malik, B.M., Cermak, D.: A Low Power Unified Cache Architecture Providing Power and Performance Flexibility. In: Int. Symp. On Low Power Electronics and Design, June 2000, pp. 241–243 (2000)

3. Zhang, D., Vahid, F.: Cache configuration exploration on prototyping platforms. In: 14th IEEE Interational Workshop on Rapid System Prototyping, June 2003, p. 164 (2003)

4. Gordon-Ross, A., Vahid, F., Dutt, N.: Automatic Tuning of Two-Level Caches to Embedded Aplications. In: DATE, pp. 208–213 (February 2004)

5. Gordon-Ross, A., Vahid, F., Dutt, N.: Fast Configurable-Cache Tuning with a Unified Second-Level Cache. In: ISLPED 2005 (August 2005)

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