Fast Instruction Memory Hierarchy Power Exploration for Embedded Systems

Author:

Kroupis Nikolaos,Soudris Dimitrios

Publisher

Springer Berlin Heidelberg

Reference22 articles.

1. Segars, S.: Low power design techniques for micro-processors. In: International Solid State Circuit Conference (February 2001)

2. Zhang, D., Vahid, F.: Cache configuration exploration on prototyping platforms. In: 14th IEEE International Workshop on Rapid System Prototyping, June 2003, pp. 164–170 (2003)

3. Lecture Notes in Computer Science;A.G. Silva-Filho,2006

4. Gordon-Ross, A., Vahid, F., Dutt, N.: Automatic Tuning of Two-Level Caches to Embedded Applications. In: Design, Automation and Test in Europe, DATE, February 2004, pp. 208–213 (2004)

5. Givargis, T., Vahid, F.: Platune: A Tuning framework for system-on-a-chip platforms. IEEE Trans. Computer-Aided Design 21, 1–11 (2002)

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