Center Potential Based Analysis of Si and III-V Gate all around Field Effect Transistors (GAA-FETs)
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-020-00559-2.pdf
Reference31 articles.
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3. Tripathi SL, Sinha SK, Patel GS (2020) Low-power efficient p+ Si0.7Ge0.3 pocket Junctionless SGTFET with varying operating conditions. J Electron Mater 49:4291–4299
4. V. Mishra, Y. K. Verma, P. K. Verma, and S. K. Gupta, “Ferroelectric Dual Material Gate All Around TFET Architecture for Enhanced Electrical Performance,”, 15th IEEE India Council International Conference (INDICON), Coimbatore, India, 2018
5. Albahrani SA, Heuken L, Schwantuschke D, Gneiting T, Burghartz JN, Khandelwal S (2020) Consistent surface-potential-based modeling of drain and gate currents in AlGaN/GaN HEMTs. IEEE Trans. Electron Devices 67(2):455–462
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