Modified Core-Shell Double Gate Junctionless MOSFET with High ON-State and Low Leakage Currents
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
http://link.springer.com/content/pdf/10.1007/s12633-019-00352-w.pdf
Reference23 articles.
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3. Jin X, Liu X, Wu M, Chuai R, Lee JH, Lee JH (2013) A unified analytical continuous current model applicable to accumulation mode (junctionless) and inversion mode MOSFETs with symmetric and asymmetric double-gate structures. Solid State Electron 79:206–209
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5. Coquand, R., Barraud, S., Cassé, M., Leroux, P., Vizioz, C., Comboroure, C., Perreau, P., Ernst, E., Samson, M.P., Maffini-Alvaro, V. and Tabone, C., (2012) Scaling of high-k/metal-gate Trigate SOI nanowire transistors down to 10nm width. In 2012 13th international conference on ultimate integration on silicon (ULIS): 37-40
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