An Improved Analytical Model of Outer Fringe Capacitance of Multifin Diamond Shaped Raised Source/Drain FinFET
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-020-00683-z.pdf
Reference29 articles.
1. Tinoco J.C., Salas S., Martinez-Lopez A.G., Alvarado J., Raskin J.P. (2013) Impact of extrinsic capacitances on FiNFETs RF performance. IEEE Trans. Microwave Theory and Tech. 61(2):833–840. https://doi.org/10.1109/TMTT.2012.2231697
2. Shrivastava R., Fitzpatrick K. (1982) A simple model for the overlap capacitance of VLSI MOS Devices. IEEE Trans. of Electron Devices 29(12):1870–1875. https://doi.org/10.1109/T-ED. 21044
3. Suzuki K. (1999) Parasitic Capacitance of Submicrometer MOSFET’s. IEEE Trans. of Electron Devices 46(9):1895–1900. https://doi.org/10.1109/16.784191
4. Mohapatra N.R., Desai M.P., Narendra S.G., Rao V.R. (2003) Modeling of Parasitic Capacitances in Deep Submicrometer Conventional and High-K Dielectric MOS Transistors. IEEE Trans. of Electron Devices 50(4):959–966. https://doi.org/10.1109/TED.2003.811387
5. Roy A., ENz C.C., Sallese J.M. (2006) Compact modeling of gate sidewall capacitance of DG-MOSFET. IEEE Trans. on Electron Devices 53(10):2655–2657. https://doi.org/10.1109/TED.2006.882029
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Parasitic Gate Capacitance Model for N-Stack Forksheet FETs;IEEE Transactions on Electron Devices;2024-03
2. Parasitic Capacitance Model for Stacked Gate-All-Around Nanosheet FETs;IEEE Transactions on Electron Devices;2024-01
1.学者识别学者识别
2.学术分析学术分析
3.人才评估人才评估
"同舟云学术"是以全球学者为主线，采集、加工和组织学术论文而形成的新型学术文献查询和分析系统，可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容，当前同舟云学术共收录了国内外主流学术期刊6万余种，收集的期刊论文及会议论文总量共计约1.5亿篇，并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询！咨询电话：010-8811{复制后删除}0370
www.globalauthorid.com
TOP
Copyright © 2019-2024 北京同舟云网络信息技术有限公司 京公网安备11010802033243号 京ICP备18003416号-3