Impact of Process Variability on Threshold Voltage in Vertically-Stacked Nanosheet TFET
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electronic, Optical and Magnetic Materials
Link
https://link.springer.com/content/pdf/10.1007/s12633-022-02256-8.pdf
Reference29 articles.
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2. Goswami B, Sengupta SJ, Reja W, Das P, Sarkar SK (2021) Validation of input/output characteristics of symmetrical double source tfet device. In: 2021 Devices for integrated circuit (devIC)
3. Mustakim N, Hussain S, Saha JK (2020) Characterization of charge plasma-based junctionless tunneling field effect transistor (jl-tfet). In: 2020 IEEE International symposium on smart electronic systems (iSES) (formerly inis)
4. Kim JH, Kim S, Park BG (2019) Double-gate tfet with vertical channel sandwiched by lightly doped si. IEEE Trans Electron Devices 66(4):1656–1661
5. Sahu SA, Mohapatra SK, Goswami R (2018) Comparative analysis of double gate tfet and hetero dielectric double gate tfet. In: 2018 International conference on applied electromagnetics, signal processing and communication (AESPC), vol 1, pp 1–4, DOI https://doi.org/10.1109/AESPC44649.2018.9033293
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