Subgraph matching-based reference placement for printed circuit board designs-Reference-Cited by-同舟云学术

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Subgraph matching-based reference placement for printed circuit board designs

Published:2024-07-06 Issue:16 Volume:80 Page:24324-24357
ISSN:0920-8542
Container-title:The Journal of Supercomputing
language:en
Short-container-title:J Supercomput

Author:

Zhu Ziran,Li Yilin,Su Miaodi,Zhang Shu,Su Haiyuan,Xiao Yifeng,He Huan,Chen Jianli,Chang Yao-Wen

Funder

the National Natural Science Foundation of China

National Natural Science Foundation of China

the MOST of Taiwan

Publisher

Springer Science and Business Media LLC

Link

https://link.springer.com/content/pdf/10.1007/s11227-024-06338-9.pdf

Reference28 articles.

1. Su M, Xiao Y, Zhang S, Su H, Xu J, He H, Zhu Z, Chen J, Chang Y-W (2022) Late breaking results: Subgraph matching based reference placement for pcb designs. In: Proceedings of the 59th ACM/IEEE Design Automation Conference, pp 1400–1401

2. Khandpur RS (2006) Printed circuit boards design, fabrication, and assembly. The McGraw-Hill Companies, New York

3. Zhang D, Ren Q, Su D (2021) A novel authentication methodology to detect counterfeit pcb using pcb trace-based ring oscillator. IEEE Access 9:28525–28539. https://doi.org/10.1109/ACCESS.2021.3059100

4. Ismail FS, Yusof R, Khalid M (2012) Optimization of electronics component placement design on pcb using self organizing genetic algorithm (soga). J Intell Manuf 23:883–895

5. Satomi Y, Hachiya K, Kanamoto T, Watanabe R, Kurokawa A (2020) Thermal placement on pcb of components including 3d ics. IEICE Electron Express 17(3):20190737–20190737

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